1. Field of the Invention
This invention relates generally to semiconductor processing, and more particularly to methods an apparatus of examining device layouts for potential printing errors.
2. Description of the Related Art
The translation of a logic design into an actual integrated circuit requires the creation of a circuit layout. Normally layout creation begins with the assembly of a plurality of smaller logic cells into progressively larger and complex structures. Often, standard logic cells are used at this stage. When the layout is complete, a set of reticles is fabricated to print the layout on a wafer using lithography processing.
Design rules are used as a bridge between the layout and the fabricated circuit. The goal of any design rule is to ensure the printability of the structures specified in the layout. Accordingly, layouts typically undergo one or more design rule checks prior to tape-out and reticle fabrication. Not surprisingly, there is a constant tension between the need for higher packing density and acceptable device yields. Conventional design rules are developed based on experimental data obtained from design, fabrication and metrology on a set of test structures. Conventional design rules are generated at an early stage of process development and are used as guidelines for successive layout designs. They are typically expressed as dimensional constraints over layout geometries and their purpose is to guarantee high yield in a production environment. Many conventional rules apply a simple binary decision to a given feature of a layout. If the feature is, say larger than the applicable design rule, then the feature is deemed to pass. Conversely, if the feature is smaller than the minimum specified by the design rule, then the feature is flagged as a failure.
In the sub-wavelength lithography regime, the binary nature of conventional design rules can sometimes not sufficiently predict printing faults or result in larger spacings than actually necessary. There can be an attendant penalty in packing density. Design Rules are often set in a pessimistic way to guarantee a high yield under all circumstances of process and design environment. But with technology scaling, a simple design rule set can no longer find a balance between performance (as a correlate to area) and yield and therefore more and more rules are added in order to capture the impact of different design environment. As a result the complexity of design rules checks is dramatically increased and so is the total number of these checks. In order to limit the proliferation of design rules, the concept of restrictive design rules is introduced. Restrictive design rules aim at even more conservative dimensional constraints in order to ensure high yield. The use of restrictive design rules though, has a negative side effect of greatly increasing the layout area to implement a given design.
The present invention is directed to overcoming or reducing the effects of one or more of the foregoing disadvantages.